Information processing apparatus and driver

ABSTRACT

According to one embodiment, an information processing apparatus includes a memory includes a buffer area, a first storage, a second storage and a driver. The buffer area is reserved in order to transfer data between the driver and a host system that requests for data writing and data reading. The driver is configured to write data into the second storage and read data from the second storage in units of predetermined blocks using the first storage as a cache for the second storage. The driver is further configured to reserve a cache area in the memory, between the buffer area and the first external storage, and between the buffer area and the second storage. The driver is further configured to manage the cache area in units of the predetermined blocks.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority fromJapanese Patent Application No. 2010-111280, filed May 13, 2010; theentire contents of which are incorporated herein by reference.

FIELD

Embodiments described herein relate generally to an informationprocessing apparatus such as a personal computer that incorporates, forexample, a solid sate drive (SSD) and a hard disk drive (HDD), using theSSD as a cache for the HDD thereby to increase the speed of accessing tothe HDD, and also to a driver that operates in the informationprocessing apparatus.

BACKGROUND

In today's information society, great amounts of data are used. HDDs arewidely used as data storage media. This is because each HDD has a largestorage capacity and is relatively inexpensive. Although the HDD canhold much data and is relatively inexpensive, it has a relatively lowaccess speed.

In comparison with the HDD, the flash memory has indeed a high accessspeed. It is, however, expensive. if SSDs each. having a flash memoryare used in place of all HDDs in a file server that has several HDDs,the manufacturing cost of the file server will greatly increase.

In view of this, various high-speed data storage systems have beenproposed, in which a plurality of data storage media of differentcharacteristics are combined to attain a large storage capacity antiachieve a high access speed.

In a data storage system including a first data storage medium that isexpensive and operates at high speed, and a second data storage mediumthat is inexpensive and operates at low speed, the first data storagemedium may be used as a cache for the second data medium. Then, anaccess to the second data storage media can be apparently faster.

In a data storage system having this configuration, the first datastorage medium and the second storage medium are accessed independentlyin most cases. Some measures must therefore be taken to increase thespeed and efficiency of the data transfer between the first and seconddata storage media.

BRIEF DESCRIPTION OF THE DRAWINGS

A general architecture that implements the various features of theembodiments will now be described with reference to the drawings. Thedrawings and the associated descriptions are provided to illustrate theembodiments and not to limit the scope of the invention.

FIG. 1 is art exemplary diagram showing a system configuration of aninformation processing apparatus according to an embodiment.

FIG. 2 is an exemplary conceptual diagram illustrating the operatingprinciple of the HDD/SSD driver (cache driver) incorporated in theinformation processing apparatus according to the embodiment.

FIG. 3 is an exemplary first diagram showing an exemplary existentsector bit map and dirty sector bit map reserved in the informationprocessing apparatus according to the embodiment.

FIG. 4 is an exemplary second diagram showing an exemplary existentsector bit map and dirty sector bit map provided in the informationprocessing apparatus according to the embodiment.

FIG. 5 is an exemplary diagram showing an exemplary Dirty flag andPartial flag provided in the information processing apparatus accordingto the embodiment.

FIG. 6 is an exemplary diagram showing an exemplary ownership flagprovided in the information processing apparatus according to theembodiment.

FIG. 7 is an exemplary diagram showing an exemplary write trace areareserved in the information processing apparatus according to theembodiment.

FIG. 8 is an exemplary diagram showing an exemplary area reserved in theinformation processing apparatus, to record the ID data about the SSDand HDD and the number of times the power switch has been closed.

FIG. 9 is an exemplary diagram showing an exemplary pin flag provided inthe information processing apparatus according to the embodiment.

FIG. 10 is an exemplary conceptual diagram explaining how theinformation processing apparatus according to the embodiment reads aminimum amount of data that should be processed to achieve data merging.

FIG. 11 is an exemplary conceptual diagram explaining how theinformation processing apparatus according to the embodiment managesdata in the set associative mode.

DETAILED DESCRIPTION

Various embodiments will he described hereinafter with reference to theaccompanying drawings.

In general, according to one embodiment, an information processingapparatus includes a memory comprising a buffer area, a first storage, asecond storage and a driver. The buffer area is reserved in order totransfer data between the driver and a host system that requests fordata writing and data reading. The driver is configured to write datainto the second storage and read data from the second storage in unitsof predetermined blocks using the .first storage as a cache for thesecond storage. The driver is further configured to reserve a cache areain the memory, between the buffer area and the first external storage,and between the buffer area and the second storage. The driver isfurther configured to manage the cache area in units of thepredetermined blocks.

FIG. 1 is an exemplary diagram showing a system configuration of aninformation processing apparatus according to art embodiment. Theinformation processing apparatus is implemented as a personal computer.

As shown in FIG. 1, the information processing apparatus includes acentral processing unit (CPU) 11. a memory controller hub (MCH) 12, amain memory 13, an I/O control hub (ICH) 14, a graphics processing unit(GPU, or display controller) 15, a video memory (VRAM) 15A, a soundcontroller 16, a basic input/output system-read only memory (BIOS-ROM)17, an HDD 18, an SSD 19, an optical disc drive (ODD) 20, variousperipheral devices 21, an electrically erasable programmable ROM(EEPROM) 22, and an embedded controller/keyboard controller (EC/KBC) 23.

The CPU 11 is a processor that controls the other components of theinformation processing apparatus, and executes the various programsloaded into the main memory 13 from the HDD 18 or ODD 20. The programsthe CPU 11 may execute include OS 110 that manages resources, an HDD/SSDdriver (cache driver) 120 and various application programs 130 thatoperate under the control of the OS 110. The HDD/SSD driver 120 is aprogram that controls the HDD 18 and the SSD 19. In the informationprocessing apparatus, the SSD 19 is used, either in part or in entirely,as a cache for the HDD 18, thereby to access the HDD 18 faster thanotherwise. The HDD/SSD driver 120 is configured to make the SSD 19function as a cache. The operating principle of the HDD/SSD driver 120will be described below, in detail.

If a part of the SSD 19 is used as a cache for the HDD 18, the otherpart of the SSD 19 is allocated as a data area that the variousapplication programs 130, for example, can use, merely issuing commandsto the SSD 19. lithe entire SSD 19 is used as a cache for the HDD 18,the existence of the SSD 19 is concealed to the various applicationprograms 130, etc.

The CPU 11 also executes a BIOS stored in the BIOS-ROM 17. The BIOS is ahardware control program. Hereinafter, the BIOS stored in the BIOS-ROM17 will be described as BIOS 17 in sonic cases.

The MCH 12 operates as a bridge that connects the CPU 11 and the ICH 14,and also as a memory controller that controls the access to the mainmemory 13. The MCH 12 includes the function of performing communicationwith the GPU 15.

The GPU 15 operates as a display controller to control the displayincorporated in or connected to the information processing apparatus.The GPU 15 includes the VRAM 15A and incorporates an accelerator thatgenerates, in place of the CPU 11, the images that the various programsmay display.

The ICH 14 incorporates an integrated device electronics (IDE)controller that controls the HDD 19, SSD 19 and ODD 20. The ICH 14 alsocontrols the various peripheral devices 21 connected to a peripheralcomponent interconnection (PCI) bus. Further, the ICH 14 includes thefunction of performing communication with the sound controller 16.

The sound controller 16 is a sound source device that outputs audio dataitems the various programs may play back, to a speaker or the like whichis either incorporated in or connected to the information processingapparatus.

The EEPROM 22 is a memory device configured to store, for example, IDdata of the information processing apparatus and environment-settingdata. The EC/KBC 23 is a one-chip micro processing unit (MPU) in whichan embedded controller and a keyboard controller are integrated. Theembedded controller manages power. The keyboard controller controls datainput at a keyboard and a pointing device.

FIG. 2 is an exemplary conceptual diagram illustrating the operatingprinciple of the HDD/SSD driver that operates in the informationprocessing apparatus configured as described above.

A user buffer 250 is an area reserved in die main memory 13 by the OS110, which the application programs 130 uses to write data in the HDD 18or read data from the HDD 18. The HDD/SSD driver 120 performs a processof writing data in the HDD 18 so that the data may be written in theuser buffer 250, or a process of storing, in the user buffer 250, thedata read from the HDD 18. That is, the user buffer 250 is a storagearea reserved in the main memory 13 in order to achieve data transferbetween a higher system (host system) and the HDD/SSD driver 120.

As described above, the information processing apparatus uses the SSD 19as a cache for the HDD 18, thereby accessing the HDD 18 faster thanotherwise. Thus, the HDD/SSD driver 120, which controls the HDD 18 andthe SSD 19, reserves an L1 cache area 201 in the main memory 13, betweenthe user buffer 250, on the one hand, and the HDD 18 and SSD 19, on theother. In this embodiment, the SSD 19 is used as a storage medium thatfunctions as a cache for the HOD 18. Nonetheless, a data storage mediumcan of course be used instead, as a nonvolatile cache (NVC).

The HDD/SSD driver 120 manages the L1 cache area 201 in the main memory13, in units of blocks each having a size of, for example, 64 byteskilobytes. The HDD/SSD driver 120 receives a write request or a readrequest from the host system, the former requesting data writing intothe HDD 18, and the latter requesting data reading from the HDD 18. TheHDD/SSD driver 120 divides the write request into write-request segmentsassociated with data blocks, respectively, and the read request intoread-request segments associated with data blocks, respectively. TheHDD/SSD driver 120 issues the write-request segments or read-requestsegments, as needed, to the HDD 18 or the SSD 19. In order to manage thedata in the L1 cache area 201 and the data in the SSD 19 (used as cachefor the HDD 18), the HDD/SSD driver 120 reserves a management datastorage area 202 in the main memory 13.

(Process of Reading Data)

How the HDD/SSD driver 120 reads data in response to a read requestcoming from the host system will be explained first.

If all read data is stored in the L1 cache area 201, the HDD/SSD driver120 stores the data in the L1 cache area 210 into the user buffer 250(a3 in FIG. 2). The HDD/SSD driver 120 then notifies the host systemthat the data reading process has been completed.

If a part of the read data exists in the L1 cache area 201, the HDD/SSDdriver 120 reads the other part of the data, which does not exist in theL1 cache area 201, from the HDD 18 into the L1 cache area 201 (a5 inFIG. 2), and stores, in the user buffer 250, the data request by thehost system (a3 in FIG. 2). At this point, the HDD/SSD driver 120notifies the host system that the data reading process has beencompleted. Thereafter, the HDD/SSD driver 120 reserves a space in theSSD 19 and accumulates the request data in this space (a8 in FIG. 2). Atthe time the data is stored in the user buffer 250, or before the datais accumulated in the SSD 19, the HDD/SSD driver 120 notifies the hostsystem that the data reading process has been completed. The host systemcan therefore go to the next process. Note that the HDD/SSD driver 120reserves a space in the SSD 19, by using an unused area or ant areawhich does not hold data to be written to the HDD 18 and which remainsnot accessed longer than any other area. Whenever necessary, the HDD/SSDdriver 120 reserves a space in the SSD 19 in the same way.

If the read data does not exist in the L1 cache area 201, but exists inthe SSD 19, the HDD/SSD driver 120 reads the data stored in the SSD 19and stores the data into the user buffer 250 (a9 in FIG. 2). Then, theHDD/SSD driver 120 notifies the host system that the data readingprocess has been completed.

If the read data does not exist in the L1 cache area 201 and if a partof the data exists in the SSD 19, the HDD/SSD driver 120 reserves aspace in the L1 cache area 201. Then. the HDD/SSD driver 120 reads apart of the data from the SSD 19 and the data from the HDD 18 and storesthem in the space thus reserved in the L1 cache area 201 (a5 and a7 inFIG. 2). To reserve a space in the L1 cache area 201, the HDD/SSD driver120 uses an unused area or an area which does not hold data to bewritten to the HDD18 and not accumulated in the SSD 19 and which remainsnot accessed longer than any other area. Whenever necessary, the HDD/SSDdriver 120 reserve a space in the L1 cache area 201 in the same way. TheHDD/SSD driver 120 stores the data read, i.e., requested data read intothe space reserved in the L1 cache area 201, into the user butler 250(a3 in FIG. 2). Then, the HDD/SSD driver 120 notifies the host systemthat the data reading process has been completed. Thereafter, theHDD/SSD driver 120 reserves a space in the SSD 19 and accumulates thedata in the space reserved in the SSD 19 (a8 in FIG. 2).

If the read data exists neither in the L1 cache area 201 nor the SSD 19,the HDD/SSD driver 120 reserves a space in the L1 cache area 201 andreads the data stored in the HDD 18 into the space reserved in the L1cache area 201 (a5 in FIG. 2). The HDD/SSD driver 120 stores the dataread into the space reserved in the L1 cache area 201, i.e., datarequested, into the user buffer 250 (a3 in FIG. 2). Then, the HDD/SSDdriver 120 notifies the host system that the data reading process hasbeen completed. Thereafter, the HDD/SSD driver 120 reserves a space inthe SSD 19 and accumulates the data in the space reserved in the SSD 19(a8 in FIG. 2).

(Process of Writing Data)

How the HDD/SSD driver 120 writes data in response to a write requestcoming from the host system will now be explained.

If the data to update exits in the L1 cache area 201 only, not in theSSD 19 at all, the HDD/SSD driver 120 rewrites the data stored in the L1cache area 201 (a4 in FIG. 2) and notifies the host system that the datawriting process has been completed. Thereafter, the HDD/SSD driver 120reserves a space in the SSD 19 and accumulates the rewritten data in thespace reserved in the SSD 19 (a8 in FIG. 2).

If the data to update exits in both the L1 cache area 201 and the SSD19, the HDD/SSD driver 120 invalidates the data in the SSD 19 andrewrites the data stored in the L1 cache area 201 (a4 in FIG. 2). Then,the HDD/SSD driver 120 notifies the host system that the data writingprocess has been completed. Thereafter, the HDD/SSD driver 120 reservesa space in the SSD 19 and accumulates the rewritten data in the spacereserved in the SSD 19 (a8 in FIG. 2).

If the data to update exits in the SSD 19 only, not in the L1 cache area201, the HDD/SSD driver 120 rewrites the data stored in the SSD 19 (a10in FIG. 2). Then, the HDD/SSD driver 120 notifies the host system thatthe data writing process has been completed.

If the data to update exits in neither the SSD 19 nor the L1 cache area201, the HDD/SSD driver 120 reserves a space in the L1 cache area 201and stores the write data, in the space reserved in the L1 cache area201 (a4 in FIG. 2). Then, the HDD/SSD driver 120 notifies the hostsystem that the data writing process has been completed. Thereafter, theHDD/SSD driver 120 reserves a space in the SSD 19 and accumulates thedata stored in the L1 cache area 201, in the space reserved in the SS 19(a9 in FIG. 2).

(Process of Flushing Data)

The HDD/SSD driver 120 performs a process of flushing data,transferring, to the HDD 18, data that has not ever been written in theHDD 18 That is, the HDD/SSD driver 120 writes the data stored in the L1cache area 201 into the HDD 18 (a6 in FIG. 2). The data stored in theSSD 19 is written into the HDD 18, after it has been stored in the L1cache area 201 (a7 and a6 in FIG. 2).

In the information processing apparatus, the SSD 19 is thus used as acache for the HDD 18. The HDD/SSD driver 120, which controls the HDD 18and the SSD 19, reserves an L1 cache area 201 in the main memory 13,between the user buffer 250, on the one hand, and the HDD 18 and SSD 19,on the other. Moreover, the HDD/SSD driver 120 manages the L1 cache area201 in units of blocks, whereby data is transferred between the HDD 18and the SSD 19 at high speed and high efficiency (a3 to a8 in FIG. 2),

The host system may issue a write force-unit access (FUA) request for aprocess of writing data in the write-through mode. In this case, theHDD/SSD driver 120 not only performs the ordinary data writing process,but also issues a write FUA request to the HDD 18, upon receiving thewrite FUA request. Then, the HDD/SSD driver 120 notifies the host systemof the completion of the data writing process after it has received anotification of the data writing process from the HDD 18.

As described above in conjunction with “(Process of Reading Data),” theHDD/SSD driver 120 reads the data stored in the SSD 19 and stores thedata into the user buffer 250 if the data to read does not exist in theL1 cache area 201, but exists in the SSD 19 (a9 in FIG. 2). This datareading process may be performed via the L1 cache area 201. That is, theHDD/SSD driver 120 may first reserve a space in the L1 cache area 201,may then read the data stored in the SSD 19 and store the same into thespace, and may finally store this data into the user buffer 250 (a7 anda3 in FIG. 2). In this case, the data can be read again, as needed, fromthe L1 cache area 201 that achieves higher performance than the SSD 19.

Assume that the data to read does not exist in the L1 cache area 201,but exists in the SSD 19. Then, to read the data stored in the SSD 19and store the same into the user buffer 250, a parameter indicatingwhether the data should be read via the L1 cache area 201 or not may besupplied to the HDD/SSD driver 120. If this is the case, only onedriver, i.e., HDD/SSD driver 120, can cope with both a system in whichdata should not better be read via the L1 cache area 201 (a9 in FIG. 2)and a system in which data should better be read via the L1 cache area201 (a7 and a3 in FIG. 2).

As described above in conjunction with “(Process of Writing Data),” theHDD/SSD driver 120 notifies the host system of the completion of thedata writing process when the data is accumulated in the L1 cache area201 or the SSD 19. This operating mode shall hereinafter be referred toas “write-back (WB) mode.” The information processing apparatus canoperate not only in the WB mode, but also in the write-through (WT)mode. In the WT mode, the HDD/SSD driver 120 may accumulate data in theL1 cache area 201 or the SSD 19 and wire the data into the HDD 18, andmay then notify the host system of the completion of the data writingprocess. Further, a parameter indicating whether the data should bewritten in the WB mode or the WT mode may be supplied to the HDD/SSDdriver 120. How the HDD/SSD driver 120 operates in the WI mode inresponse to a write request coming from the host system in will beexplained below.

The data to update may exist in the L1 cache area 201 only, that is, thedata may exist in the L1 cache area 201 but not in the SSD 19. In thiscase, the HDD/SSD driver 120 rewrites the data in both the L1 cache area201 and the HDD 18 (a4 and a2 in FIG. 2). When the data is written inboth the L1 cache area 201 and the HDD 18, the HDD/SSD driver 120notifies the host system of the completion of the data writing process.When the data is completely rewritten in the HDD 18, the HDD/SSD driver120 reserves a space in the SSD 19, and accumulates the data stored inthe L1 cache area 201, in the space reserved in the SSD 19 (a8 in FIG.2).

The data to update may exist in both the L1 cache area 201 and the L1cache area 201. In this case, the HDD/SSD driver 120 rewrites the datain both the L1 cache area 201 and the L1 cache area 201 (a4, a10 and a2in FIG. 2). When the data is so rewritten, the HDD/SSD driver 120notifies the host system of the completion of the data writing process.As the data is rewritten in the SSD 19, first, HDD/SSD driver 120 mayinvalidate the data stored in the SSD 19. After the data has beenrewritten in the L1 cache area 201 (a4 in FIG. 2), HDD/SSD driver 120may reserve a space in the SSD 19 and may then accumulate the rewrittendata in the space reserved in the SSD 19 (a8 in FIG. 2).

The data to update may exist in the SSD 19 only, that is, it may existin the SSD 19 but not in the L1 cache area 201. If this is the case, theHDD/SSD driver 120 rewrites data in both the SSD 19 and the HDD 18 (a10and a2 in FIG. 2). When the data is rewritten in both the SSD 19 and theHDD 18, the HDD/SSD driver 120 notifies the host system of thecompletion of data rewriting process.

The data to update may exist in neither the L1 cache area 201 nor theSSD 19. In this case, the HDD/SSD driver 120 rewrites data in the HDD 18(a2 in FIG. 2). After the data is so rewritten, the HDD/SSD driver 120notifies the host system of the completion of the data rewritingprocess. The data rewriting process performed if the data, to rewriteexists in neither the L1 cache area 201 nor the SSD 19 includes writingnew data (i.e., replacing invalid data with valid data).

The HDD/SSD driver 120 thus operates in the WB mode or the WT mode inaccordance with the parameter. One driver, i.e., HDD/SSD driver 120, cantherefore cope with both a system in which data should better be writein the WB more and a system in which data should better be write in theWT mode.

Further, in the WT mode, the HDD/SSD driver 120 may not rewrite the datato update, if stored in the SSD 19, but may instead invalidate the datastored in the SSD 19. This operating mode shall be called “WI mode.” Ifthe WI mode is selected in accordance with the parameter, the HDD/SSDdriver 120 can operate more efficiently if the SSD 19 has a lowerdata-rewriting performance than the HDD 18.

(Process of Managing Data)

As described above, the HDD/SSD driver 120 manages the L1 cache area 201reserved in the main memory 13, in units of blocks, and writes and readsdata into and from the HDD 18 in units of blocks. How the HDD/SSD driver120 manages data will be now explained.

In the WB mode, a write request coming from the host system does notalways request that data be written in units of blocks. If one block iscomposed of 128 sectors, it must be determined which sectors hold validdata and which sectors hold the data (Dirty) to be written to the HUD18. To this end, the HDD/SSD driver 120 provides an existent-sector bitmap (“A” of FIG. 3) and a dirty-sector bit map (“B” of FIG. 3), each forthe blocks of the L1 cache area 201 in the main memory 13 and the SSD 19(part of the SSD 19 used as a cache for the HDD 18). The existent-sectorbit map and the dirty-sector bit map are provided as management datamanaged in the management data storage area 202.

The existent-sector bit map is management data representing which sectorin the associated block is valid. The dirty-sector bit map is managementdata representing which sector in the associated block is dirty. Thesetwo sector bit maps hold bits, as shown in FIG. 4, each representing,the state of each sector in the block. Hence, if one block is composedof 128 sectors, either sector bit map holds 128 bits, or 16 bytes, foreach block.

These two bit maps are managed. The HDD/SSD driver 120 can therefore usethe L1 cache area 201 reserved in the main memory 13 and the SSD 19,thereby appropriately writing or reading data into and from the HDD 18.

As described above, the dirty-sector bit map is provided to determinewhich sector is dirty in each block. Therefore, a large storage capacityis required, which is (number of blocks in the L1 cache area 201+thenumber of blocks in the SSD 19)×16 bytes. In view of this, the HDD/SSDdriver 120 may not provide the dirty-sector bit map, and may provide aDirty flag and a Partial flag (both shown in FIG. 5) for each block inthe L1 cache area 201 of the main memory 13 and for each block in theSSD 19 used as cache for the HDD 18. The Dirty flag indicates whetherthe data (Dirty) to be written to the HDD 18 exists in the block. ThePartial flag indicates whether the data (Dirty) existing in the block ispartial or not. These flags are provided as management data managed inthe management data storage area 202 reserved in the main memory 13.

The dirty flag is true if the data (Dirty) to be written to the HDD 18exists in the block, and is false if the data (Dirty) to be written tothe HDD 18 does not exist in the block. The Partial flag is true if allsectors exist in the block, and is false if only some sectors exist inthe block. Since all sectors exist in the block if the Partial flag isfalse, the existent-sector bit map need not be referred to, in somecases.

(Nonvolatile Operation)

The HDD/SSD driver 120 performs a nonvolatile operation so that the dataaccumulated in the SSD 19 may be used even after the informationprocessing apparatus has been activated again. The nonvolatile operationis based on the assumption that the host system includes a function oftransmitting a shutdown notice to the HDD/SSD driver 120. Even aftertransmitting the shutdown notice to the HDD/SSD driver 120, the hostsystem may indeed issue a write request or a read request, but to theHDD/SSD driver 120 only. To perform the nonvolatile operation on theseconditions, the HDD/SSD driver 120 reserves a management data save area191 reserved in the SSD 19, for storing the management data controlledin the management data storage area 202 reserved in the main memory 13.

After receiving the shutdown notice, the HDD/SSD driver 120 operates inthe WT mode even if the WB mode is set, and starts a flush operation. Atthe time the flush operation is completed, the HDD/SSD driver 120guarantees that the write data remains neither in the L1 cache area 201of the main memory 13 nor in the SSD 19.

When the flush operation is completed, the HDD/SSD driver 120 stores themanagement data held in the management data storage area 202 reserved inthe main memory 13, into the management data save area 191 reserved inthe SSD 19. At this point, the HDD/SSD driver 120 needs to write anexistent-sector bit map, but no dirty data exists. Therefore, theHDD/SSD driver 120 need not write a dirty-sector bit map or a Dirtyflag/a Partial flag.

After writing the management data from the management: data storage area202 reserved in the main memory 13 into the management data save area191 reserved in the SSD 19, the HDD/SSD driver 120 operates, notchanging the management data and not causing data contradiction betweenthe HDD 18 and the SSD 19. That is, the HDD/SSD driver 120 rewrites datain both the HDD 18 and the SSD 19 when it receives a write request frontthe host system and the SSD 19 holds the data to update, and does notperform the accumulation (learning) of the read data in the SSD 19 inresponse to a read request.

After the information processing apparatus is activated again, theHDD/SSD driver 120 loads the management data stored in the managementdata save area 191 reserved in the SSD 19, into the management datastorage area 202 reserved in the main memory 13, without initializingthe management data. (This is because the main memory 13, which has theL1 cache area 201, is volatile.) The HDD/SSD driver 120 initializes onlythe management data about the L1 cache area 201.

By performing the nonvolatile operation described above, the HDD/SSDdriver 120 makes it possible to use the data accumulated in the SSD 19,even after the information processing apparatus has been activatedagain, and can guarantee that the write data remains neither in the L1cache area 201 of the main memory 13 nor in the SSD 19. In most systems.another module (capable of accessing the HDD 18), such as the BIOS 17,operates before the HDD/SSD driver 120 operates. If there remains datanot written into the HDD 18, the module (e.g., BIOS 17) must have afunction of controlling the cache (i.e., the SSD 19 and the L1 cachearea 201 of the main memory 13). In the information processingapparatus, however, the BIOS 17 or the like need not have the functionof controlling the cache. This is because the HDD/SSD driver 120performs the nonvolatile operation, guaranteeing that the write dataremains neither in the L1 cache area 201 of the main memory 13 nor inthe SSD 19.

(Guarantee of Data in Nonvolatile Operation)

The HDD/SSD driver 120 includes a function, which will be described.This function is for determining whether the data accumulated in the SSD19 is consistent with the data stored in the HDD 19. If the HDD/SSDdriver 120 determines that the data accumulated in the SSD 19 is notconsistent with the data stored in the HDD 19, it will perform avolatile operation to destroy the data accumulated in the SSD 19.

To perform this function, the HDD/SSD driver 120 provides an Ownershipflag (shown in FIG. 6) in the management data save area 191 reserved inthe SSD 19. The Ownership flag, has a value “Driver” or the other value“None.” The value “Driver” indicates that the HDD/SSD driver 120 isoperating. The value “None” indicates that the HDD/SSD driver 120 is notoperating.

When the HDD/SSD driver 120 is loaded, the HDD/SSD driver 120 checks theOwnership flag. If the Ownership flag has the value “None.” the HDD/SSDdriver 120 determines that the data accumulated in the SSD 19 can beguaranteed as consistent with the data stored in the HDD 19, and thenloads the management data stored in the management data save area 191,from the SSD 19 to the L1 cache area 201 of the main memory 13. If theOwnership flag does not have the value “None,” the HDD/SSD driver 120determines that the data accumulated in the SSD 19 cannot be guaranteedas consistent with the data stored in the HDD 19, and then initializesthe management data and makes the SSD 19 volatile (invalid).

The rule of updating the Ownership flag will be explained. The HDD/SSDdriver 120 rewrites the Ownership flag to the value “Driver” before itstarts a cache operation. In order to save the management data after thecompletion of the cache operation in the nonvolatile operation, theHDD/SSD driver 120 rewrites the Ownership flag to the value “None.”

The data cannot be guaranteed as consistent with the data stored in theHDD 19 if the power-supply interruption, a clash or a hang-up occurswhile the data information apparatus is operating. Nonetheless, thereliability of the data can be raised because the HDD/SSD driver 120uses the data accumulated in the SSD 19 only if the data consistency canbe guaranteed by using the Ownership flag as described above.

As described above, the HDD/SSD driver 120 alone guarantees the data inthe nonvolatile operation. Nevertheless, another module (i.e., BIOS 17,here) capable of accessing the HDD 18 before the HDD/SSD driver 120starts operating may have a minimal cache controlling function toperform the nonvolatile operation as described below, even if the modulehas written data into the HDD 18.

In this case, the Ownership flag can have a third value “BIOS,” whichindicates that the BIOS 17 is operating. Hence, the value “None”indicates that neither the BIOS 17 nor the HDD/SSD driver 120 isoperating. Note that a write trace area is reserved in the managementdata save area 191.

When activated, the BIOS 17 examines the Ownership flag. If theOwnership flag has the value “None,” the BIOS 17 determines that thedata consistency can be guaranteed and then rewrites the Ownership flagto the value “BIOS.” if the Ownership flag has not the value “None,” theBIOS 17 determines that the data consistency cannot be guaranteed. Inthis case, the BIOS 17 leaves the Ownership flag not rewritten.

If the BIOS 17 finds that the data consistency can be guaranteed, ittherefore changes the Ownership flag to the value “BIOS.” In this case,the BIOS 17 accumulates write commands for writing data into the HDD 18,in units of blocks as shown in FIG. 7, in the write trace area reservedin the management data save area 191, when it writes data into the HDD18. Since the write command is written in units of blocks, no requestlength is required. That is, the logical block addresses (LBAs) of therespective data blocks are used, thereby reducing the amount of tracedata. If the write trace area overflows, the BIOS 17 first stopsaccumulating the write commands, and then rewrites the Ownership flag tothe value “None.”

On the other hand, the HDD/SSD driver 120 examines the Ownership flag,when it is loaded. If the Ownership flag has the value “BIOS,” theHDD/SSD driver 120 finds that the data consistency can be guaranteed.The HDD/SSD driver 120 then loads the management data from themanagement data save area 191 reserved in the SSD 19 into the managementdata storage area 202 reserved in the main memory 13. Further, theHDD/SSD driver 120 refers to the write trace area reserved in themanagement data save area 191 of the SSD 19. data to update exists inthe SSD 19, the HDD/SSD driver 120 invalidates this data. If theOwnership flag has not the value “BIOS,” HDD/SSD driver 120 determinesthat the data consistency cannot be guaranteed. In this case, theHDD/SSD driver 120 initializes the management data and makes the SSD 19volatile (invalid).

Then, the HDD/SSD driver 120 rewrites the Ownership flag to the value“None” when the management data is stored after the completion of theflush operation during the above-mentioned nonvolatile operation.

The nonvolatile operation can thus be perforated even if the othermodule writes data into the HDD 18, only by adding a minimal function tothe other module capable of accessing the HDD 18 (e.g., BIOS 17) beforethe HDD/SSD driver 120 starts operating.

The data consistency cannot be guaranteed (i) if data in the HDD 18 isrewritten not via the HDD/SSD driver 120, for example, the data isrewritten by a program booted from the CD-ROM set in the ODD 20, (ii) ifthe HDD 18 or the SSD 19 are replaced by others, or (iii) if the HDD 18or SSD 19 is removed from the information processing apparatus, data inthe HDD 18 or SSD 19 is then updated in any other information processingapparatus and the HDD 18 or SSD 19 is incorporated back into theinformation processing apparatus. The HDD/SSD driver 120 has a functionof determining, in such an event, that the data consistency cannot beguaranteed. This function that the HDD/SSD driver 120 has will bedescribed below.

Assume that the HDD 18 and the SSD 19 used in the information processingapparatus has two functions. One function is to hold data pertaining toindividuals (hereinafter referred to as “individual data”) and providethe same in response to a request. The other function is to hold thedata representing the number of times the power switch has been closedand provide this data in response to a request. It is also assumed thatthe number of times the power switch has been closed is updated whendata is written not through the HDD/SSD driver 120, It is furtherassumed that the information processing apparatus can incorporate aplurality of HDDs 18.

To implement these functions, the HDD/SSD driver 120 reserves an area inthe management data save area 191 of the SSD 19. In this area, theindividual data is recorded, together with the number of times the powerswitch etas been closed, as shown in FIG. 8.

The HDD/SSD driver 120 acquires the individual data and the number oftime the power switch has been closed from the SSD 19 and the HDD 18,respectively, at the time of loading. Then, the HDD/SSD driver 120compares the individual data about the SSD 19 and HDD 18, stored in thearea reserved in the management data save area 191 of the SSD 19, withthe number of times the power switch has been closed. The individualdata acquired from the SSD 19 may differ from the individual datarecorded in the management data save area 191, or the number of timesthe power switch has been closed, recorded in the management data savearea 191, may not be smaller by one than the number now acquired fromthe SSD 19. In this case, the HDD/SSD driver 120 determines that thedata consistency cannot be guaranteed, initializes the management data,and makes the SSD 19 volatile (invalid).

The individual data acquired from the HDD 18 may differ is from theindividual data recorded in the management data save area 191, or thenumber of times the power switch has been closed, recorded in themanagement data save area 191, may not be smaller by one than the numbernow acquired from the HDD 18. If this is the case, the HDD/SSD driver120 determines that the data consistency cannot be guaranteed for theHDD 18, initializes the management data about the HDD 18, andinvalidates the management data about the HDD 18, which is stored in theSSD 19.

The HDD/SSD driver 120 writes the number of times the SSD 19 and HDD 18have been turned on, in the management data save area 191 of the SSD 19,when the management data is saved alter the completion of the flushoperation during the above-mentioned nonvolatile operation.

Thus, the data consistency can be determined not to be guaranteed invarious cases where the data cannot be guaranteed as consistent with thedata stored in the HDD 19.

(Cache Control by BIOS)

Not only the HDD/SSD driver 120, but also the BIOS 17 may utilize thedata accumulated in the SSD 19. How the BIOS 17 utilizes the data willbe explained.

When activated, the BIOS 17 checks the data consistency by using notonly the Ownership flag, but also the individual data about the SSD 19and HDD 18 and the number of times the SSD 19 and HDD 18 have beenturned on (the power cycle counter). If the BIOS 17 determines that thedata consistency can be guaranteed, it rewrites the Ownership flag tothe value “BIOS.” If the BIOS 17 determines that the data consistencycannot be guaranteed, it leaves the Ownership flag not rewritten.

In the process of reading data, when data consistency is guaranteed, theBIOS 17 reads the read data from the SSD 19 if the data exists, in itsentirety, in the SSD 19. Otherwise, or if the data exists, in part, inthe SSD 19 or if the data does not exist at all in SSD 19, the BIOS 17reads data from the HDD 18. When data consistency is not guaranteed, theBIOS 17 reads the read data from the HDD 18 only.

In the process of writing data, the BIOS 17 writes data into the HDD 18only. When the data consistency is guaranteed, the BIOS 18 invalidatesdata to update, if any, in the SSD 19.

If the BIOS 17 operates as described above, write commands for writingdata need not be recorded, as shown in FIG. 7, in the write trace areareserved in the management data save area 191 of the SSD 19,

This additional simple function enables the BIOS 17 to utilize the dataaccumulated in. SSD 19, thereby to shorten the activation time. If thedata to update exists in the SSD 19 at the time of writing data, theBIOS 17 may write the data into both the HDD 18 and the SSD 19. Ingeneral, the BIOS 17 cannot operate to write data into both the HDD 18and the SSD 19 in parallel, so it is therefore disadvantageous in termsof ability. In view of this, the BIOS 17 may be a module able to writedata into both the HDD 18 and the SSD 19 in parallel. In this case, datacan be written into not only the HDD 18, but also the SSD 19.

If the BIOS 17 also utilizes the data accumulated in the SSD 19, it mustrefer to the existent-sector bit map in order to determine whether alldata to read exists in the SSD 19. In view of the limited ability of theBIOS 17, it is too much for the BIOS 17 to refer to the existent-sectorbit map. A technique that enables the BIOS 17 to determine whether alldata to read exists in the SSD 19, without the necessity of referring tothe existent-sector bit map, will be explained below.

When the HDD/SSD driver 120 stores the management data after thecompletion of the flush operation during the above-mentioned nonvolatileoperation, the HDD/SSD driver 120 invalidates block of the SSD 19 forwhich the Partial flag is true, indicating that some sectors exist inthe block. Any block (.e., Partial block) holding a part of effectivedata is thereby expelled from the SSD 19 after the shutdown. This makesit easier to determine whether all data to read exists in the SSD 19.Moreover, the existent-sector bit map need not be written since thePartial block has been expelled at the time of the shutdown.

If the Partial block is invalidated as described above when themanagement data is saved after the completion of the flush operationduring the above-mentioned nonvolatile operation, the hit rate inreading data after the management data has been stored will decrease. Atechnique will be explained, which facilitates determining whether allread data exists in the SSD 19, without decreasing the hit rate afterthe management data has been stored.

After the completion of the flush operation during the above-mentionednonvolatile operation, the HDD/SSD driver 120 saves the management data,regardless of the Partial flag. The BIOS 17 reads data from the SSD 19if all the data exists in the SSD 19 and if the Partial flag is false(that is, all sectors exist in the block). When activated, the HDD/SSDdriver 120 invalidates any block for which the Partial flag is true.This sequence also makes it unnecessary to write the existent-sector bitmap at the time of saving the management data.

(High-Speed Boot)

The data used to achieve boot in any information processing apparatus isread, every time from the same area in most cases, The informationprocessing apparatus according to this embodiment uses a technique ofachieving boot at high speed. This technique will be described below.

To achieve the high-speed boot, the HDD/SSD driver 120 provides a Pinflag (shown in FIG. 9) for each block, in both the L1 cache area 201 ofthe main memory 13 and that part of the SSD 19, which is used as a cachefor the HDD 18. The Pin flag indicates that the data has been used toachieve the boot.

The BIOS 17 sets the Pin flag associated with the block if the read dataexists in the SSD 19. If the read data does not exist in the SSD 19, theBIOS 17 accumulates the identifier and block LBA of the HDD 19 in thetrace area reserved in the management data save area 191 of the SSD 19.

In this case, software is provided as one of the various applicationprograms 130, which operates when the OS 110 is activated. When thissoftware starts operating, it transmits an activation completion noticeto the HDD/SSD driver 120.

When the HDD/SSD driver 120 is activated or when it receives theactivation completion notice, it reads data from the HDD 18 into the SSD19 and sets the Pin flag associated with the block of the SSD 19, byreferring to the trace the BIOS 17 has accumulated in the managementdata save area 191 of the SSD 19. If the data to read until theactivation completion notice arrives exists in the L1 cache area 201 ofthe main memory 13 or in the SSD 19, the HDD/SSD driver 120 sets the Pinflag associated with the block. If the data to read does not exist inthe SSD 19, the HDD/SSD driver 120 reads the data from the HDD 18 intothe SSD 19 and then sets the Pin flag associated with the block of theSSD 19.

Thereafter, the HDD/SSD driver 120 utilizes the L1 cache area 201 of themain memory 13 or the SSD 19, writing data to the HDD 18 or reading datafrom the HDD 18, as requested by the host system. Thus, the HDD/SSDdriver 120 exchanges data in the L1 cache area 201 of the main memory 13or the SSD 19, so that the data accessed last may be accumulated beforethe data accessed previously. At this point, the HDD/SSD driver 120performs a control not to invalidate the data in the SSD 19, for whichthe Pin flag is set (even if the data has been accessed a long timebefore).

That is, the hit rate in reading data stored in the SSD 19 at the timeof the booting is increased, because the data used to achieve the bootis read from the same area in most cases. This helps to accomplish theboot at high speed.

When the HDD/SSD driver 120 saves the management data in the managementdata save area 191 of the SSD 19 at the time of the shutdown, it resetsall Ping flags and then starts writing the management data. All Pingflags are reset at the time of the shutdown, because every time the bootis achieved, the learning of the read data must be performed for thenext boot. As a result, the boot at high speed can be sufficientlyaccomplished even if the data area used to achieve the boot is changedto another.

A write (rewrite) request may be made to write the data for which thePin flag is set. A method of coping with this case will be explained.

As described above, the data for which the Pin flag is set has a highpossibility of being read at the next boot. However, this possibility islow, if a write request is made for the data. In this case, the BIOS 17and the HDD/SSD driver 120 reset the Pin flag for the data.

This is because even the data used in the boot has a low possibility ofbeing read at the next boot. In view of this, the Pin flag for such datais reset, invalidating the data as needed. The area for achieving theboot can therefore be used for other data. This increases the hit rate.

As described above, the data for which the Pin flag is set has a highpossibility of being read at the next boot. This is why the HDD/SSDdriver 120 performs a control so that the data accumulated in the SSD 19may not be invalidated. The data therefore remains in the SSD 19,inevitably reducing the storage capacity of the SSD 19 that is used as acache. The HDD/SSD driver 120 monitors the amount of data for which thePin flag is set. If the amount o f data exceeds a preset value, theHDD/SSD driver 120 stops setting the Pin flag, thereby excluding thesubsequent data (used in the boot) as data to remain in the SSD 19. Thestorage capacity of the SSD 19 used as a cache therefore is limited,preventing a decrease in the cache hit rate.

(Option Process in Response to the Flush/Write FUA Request)

If a flush/write FUA request is strictly processed, the write-backoperation will be greatly impaired in terms of performance. Therefore,the HDD/SSD driver 120 performs an “option flush process” function inresponse to the flush/write FUA request. The “option flush process”function can be “enabled” or “disabled.” If the function is enabled, theHDD/SSD driver 120 will operate as described below.

In the write-through operation (WT mode or after the receipt of theshutdown notice in the WB mode), the HUD/SSD driver 120 strictlyprocesses the flush/write FUA request, no matter whether the “optionflush process” function is set to “Enable” or “Disable.” If the “optionflush process” function is set to “Enable,” the HDD/SSD driver 120strictly processes the flush/write FUA request. That is, in response tothe flush FUA request, the HDD/SSD driver 120 writes all write dataexisting in the L1 cache area 201 of the main memory 13 and the SSD 19,which is not written yet, into the HDD 18. The HDD/SSD driver 120 thenissues a Flush request to the HDD 18. When the process response to theissued flush request is finished, the HDD/SSD driver 120 notifies thehost system of the completion of the process response to the flush FUArequest. In response to the write FUA request, the HDD/SSD driver 120operates as described above.

The “option flush process” function may be set to “Disable” during thewrite-back operation. If this is the case, the HDD/SSD driver 120 doesnothing in response to the flush FUA request, and transmits a completionnotice to the host system. In response to the write FUA request, theHDD/SSD driver 120 processes this request as an ordinary write request(that is, not as a write FUA request), and transmits a completion noticeto the host system. In this case, the HDD/SSD driver 120 starts theflush operation at one or both of the following events. One event is thelapse of a prescribed time from the previous flush operation. The otherevent is that the number of the blocks (Dirty blocks), each containingdata not written yet from the SSD 19 into the HDD 18, exceeds apredetermined value. The HDD/SSD driver 120 flushes all Dirty blockswhen it starts the flush operation.

Having the “option flush process” function, which can be set to either“Enable” or “Disable,” the HDD/SSD driver 120 can work well for both auser who wants to preserve the data at the expense of the performance,and a user who wants to maintain the performance at the expense of thedata preservation. In addition, the operating time of the HDD 18 can beshortened, reducing the power consumption, because the data not writtenyet into the HDD 18 is flushed altogether.

(Data Merging Process)

As indicated above, the HDD/SSD driver 120 reserves the L1 cache area201 in the main memory 13, between the user buffer 250, on the one hand,and the HDD 18 and SSD 19, on the other. Further, the HDD/SSD driver 120manages the data stored in the L1 cache area 201, in units of blocks.The HDD/SSD driver 120 includes a function of merging the data in the L1cache area 201 or SSD 19 with the data in the HDD 18 at high efficiency.This function will be explained below.

The data in the L1 cache area 201 or SSD 19 must be merged with the datain the HDD 18 if a part of the read data is stored in the L1 cache area201 or if the read data is not stored in the L1 cache area 201 and isstored in part in the SSD 19. Generally, data is read from a pluralityof areas reserved in the HDD 18, and a plurality o I read requests mustbe issued to the HDD 18. Therefore, a plurality of read requests must beissued to the SSD 19, too, in order to merge the data in the SSD 19 withthe data in the HDD 18. However, if a plurality of read requests areissued, the overhead will increase.

In order to prevent such an overhead increase, the HDD/SSD driver 120first reserves a merge buffer 203 in the main memory 13. The mergebuffer 203 has the same size as the block size. One or more mergebuffers may be reserved in the main memory 13, each used under exclusivecontrol. Alternatively, a plurality of merge buffers 203 may bereserved, each for one block in the L1 cache area 201.

To merge the data stored in the L1 cache area 201 with the data storedin the HDD 18, the HDD/SSD driver 120 reads data, it minimal amountnecessary, from the HDD 18 into a merge buffer 203. As shown in FIG. 10,the “minimal amount necessary” ranges from the head sector (lackingvalid data) to the tail sector (lacking valid data), in one block storedin the L1 cache area 201. After reading this amount of data from the HDD18 into a merge buffer 203, the HDD/SSD driver 120 copies the datalacking in the L1 cache area 201, from the merge buffer 203.

To merge the data stored in the SSD 19 with the data stored in the HDD18, the HDD/SSD driver 120 reads data, in a minimal amount necessary,from the SSD 19 into the L1 cache area 201, and reads data, in a minimalamount necessary, from the HDD 18 into a merge buffer 203. After readingthese amounts of data front the SSD 19 and the HDD 18, respectively, theHDD/SSD driver 120 copies the data lacking in the L1 cache area 201,from the merge buffer 203.

The merge buffers 203 can be utilized in the flush operation. too.During the flush operation, data is written into the HDD 18, exclusivelyfrom the L1 cache area 201. The valid data in the L1 cache area 201 maybe dispersed and may ultimately be flushed. If this is the case, aplurality of write requests must be issued to the HDD 18, inevitablyincreasing the overhead. If the valid data in the L1 cache area 201 isdispersed, the HDD/SSD driver 120 reads data, in a minimal amountnecessary, from the HDD 18 into a merge buffer 203. After reading thisamount of data from the HOD 18 into the merge buffer 203 and mergingthis data into the L1 cache area 201, the HDD/SSD driver 120 finisheswriting data into the HDD 18 by issuing one write request.

(Page Control)

The function the HDD/SSD driver 120 has to write data at high efficiencywill be described below.

The SSD 19, which is a nonvolatile cache (NVC), can read and write datain units of sectors. In the SSD 19, however, the data is managed inunits of pages in most cases. Data not mounting to one page is writtenin three steps. First, the present data is read in units of pages. Then,each page is merged with the data to write. Finally, the resulting datais written in units of pages. Inevitably, the data is written at a lowerspeed than in the case it is written in units of pages. Therefore, theHDD/SSD driver 120 performs a control of the data writing from the L1cache area 201 into the SSD 19, so that the data written may have a sizemultiples of page size as measured from the page boundary. The datarepresenting the page size of the SSD 19 can be acquired by two methods.In one method, the HDD/SSD driver 120 acquires the data from the SSD 19.In the other method, the data is given, as a set of data item (e.g.,parameter), to the HDD/SSD driver 120.

In order to write the data having a size multiples of page size asmeasured from the page boundary, from the L1 cache area 201 into the SSD19, the HDD/SSD driver 120 allocates the storage area of the SSD 19 inunits of pages and sets the block size as a multiple of the page size.

(Set Associative)

In order to increase the cache retrieval speed, the HDD/SSD driver 120can use a set associative method to manage the data stored in the L1cache area 201 and SSD 19 (used as cache for the HDD 18). Morespecifically, the HDD/SSD driver 120 manages such a table as shown inFIG. 11, in the management data storage area 202 reserved in the mainmemory 13, fir both the L1 cache area 201 and the SSD 19. Of the LBAindicating a block, some lower n bits are used as “Index” representingthe number of entries in the table. The table is controlled so that dataequivalent to the maximal number of Ways may be accumulated for anyblock that has “Index.”

Using the set associative method, the HDD/SSD driver 120 may monitor,for each “Index,” the number of data items for which Pin flags are set,thereby to prevent the number of such data items from exceeding a valueprescribed for the “index.”

Moreover, using the set associative method, the HDD/SSD driver 120 maystart the flush operation When the number of the Dirty blocks of any“Index” exceeds a predetermined value, if the “option flush process”function is set to “Disable.”

As has been described, the SSD 19 is used as a cache for the HDD 18 inthe information processing apparatus. In order to access the HDD 18faster, the HDD/SSD driver 120 that controls the HDD 18 and the SSD 19reserves the L1 cache area 201 in the main memory 13, between the userbuffer 250, on the one hand, and the FILM 18 and SSD 19, on the other,and manages the data stored in the L1 cache area 201, in units ofblocks. The speed and efficiency of the data transfer between the HDD 18and the SSD 19 is thereby increased.

The various modules of the systems described herein can be implementedas software applications, hardware and/or software modules, orcomponents on one or more computers, such as servers. While the variousmodules are illustrated separately, they may share sortie or all of thesame underlying logic or code.

While certain embodiments have been described, these embodiments havebeen presented by way of example only, and are not intended to limit thescope of the inventions. Indeed, the novel embodiments described hereinmay be embodied in a variety of other forms; furthermore, variousomissions, substitutions and changes in the form of the embodimentsdescribed herein may be made without departing from the spirit of theinventions. The accompanying claims and their equivalents are intendedto cover such forms or modifications as would fall within the scope andspirit of the inventions.

What is claimed is:
 1. An information processing apparatus comprising: amemory comprising a biffer area; a first external storage separate fromthe memory; a second external storage separate from the memory; and adriver configured to control the :first and second external storages inunits of predetermined blocks, wherein the driver comprises a cachereservation module configured to reserve a cache area in the memory, thecache area being logically between the buffer area and the firstexternal storage and between the buffer area and the second externalstorage, and the cache reservation module is configured to manage thecache area in units of the predetermined blocks, using the cache area,secured on the memory by the cache reservation module, as a primarycache for the second external storage and a cache for the first externalstorage, and using part or the entire first external storage as asecondary cache for the second external storage, the buffer area beingreserved in order to transfer data between the driver and a host systemthat requests for data writing and data reading; a read controllerconfigured to operate in response to a read request issued by the hostsystem, and configured to: store data in the cache area into the bufferarea if whole data to he read exists in the cache area, read a firstpart of data not existing in the cache area front the second externalstorage into the cache area, store the read .first part of data and asecond part of data existing in the cache area into the buffer area, andaccumulate the stored data in the first external storage, if a part ofdata to be read exists in the cache area, read data in the firstexternal storage and store the read data into the buffer area if data tobe read does not exist in the cache area and whole data to be readexists in the first external storage, read a first part of data in thefirst external storage and a second part of data in the second externalstorage into the cache area, store the read data into the buffer area,and accumulate the read data in the first external storage, if data tobe read does not exist in the cache area and a part of data to be readexists in the first external storage, and read data in the secondexternal storage into the cache area, store the read data in the bufferarea and accumulate the read data in the first external storage, if datato be read does not exist in the cache area or the first externalstorage; a write controller configured to operate in response to a writerequest issued by the host system, and configured to: rewrite data inthe cache area by data to be written and accumulate the rewritten datain the first external storage, if data to be updated exists in the cachearea and does not exist in the first external storage, invalidate datain the first external storage, rewrite data in the cache area by data tobe written and accumulate the rewritten data in the first externalstorage, if data to be updated exists in the cache area and the firstexternal storage, rewrite data in the first external storage by data tobe written if data to be updated does not exist in the cache area andexists in the first external storage, and store data to be written intothe cache area and accumulate the stored data into the first externalstorage, if data to be updated does not exist in the cache area or thefirst external storage; and a flush controller configured to store dataexisting in the cache area and not written yet into the second externalstorage, into the second external storage, and to store data existing inthe first external storage and not written yet into the second externalstorage, into the second external storage through the cache area.
 2. Theapparatus of claim 1, wherein the write controller is configured toexecute storing data into the cache area or rewriting data in the cachearea or the first external storage in accordance with conditions, and toissue a write force-unit access (FUA) request to the second externalstorage, on receiving from the host system the write FUA request.
 3. Theapparatus of claim 1, wherein the read controller is configured to storedata in the first external storage into the buffer area through thecache area if data to be read does not exist in the cache area and wholedata to be read exists in the first external storage.
 4. The apparatusof claim 3, wherein the read controller is configured to store data inthe first external storage into the buffer area in two modes, notthrough the cache area in one mode, and through the cache area in orderto accumulate the data in the cache area in the other mode, if data tobe read does not exist in the cache area and whole data to be readexists in the first external storage.
 5. The apparatus of claim 1,wherein the write controller is configured to operate in a write-throughmode, and is configured to: rewrite data in the cache area and data inthe second external storage by data to be written and accumulate therewritten data in the first external storage if data to be updatedexists in the cache area and does not exist in the first externalstorage; rewrite data in the cache area, data in the first externalstorage and data in the second external storage by data to be written,if data to be updated exists in the cache area and the first externalstorage; rewrite data in the first external storage and data in thesecond external storage by data to be written, if data to be updateddoes not exist in the cache area and exists in the first externalstorage; and rewrite data in the second external storage by data to bewritten if data to be updated does not exist in the cache area or thefirst external storage.
 6. The apparatus of claim 5, wherein the writecontroller is configured to be able to operate another operating mode inthe write-through mode, in the other operating mode, the writecontroller is configured to invalidate data in the first externalstorage, instead of rewriting the data in the first external storage, ifdata to be updated exists in the first external storage.
 7. Theapparatus of claim 1, wherein the driver further comprises artintra-block data managing module configured to provide a first sectorbit map and a second sector bit map for each block of the cache area andthe first external storage, and to manage the first sector bit map andthe second sector bit map as management data in a management datastorage area in the memory, the first sector bit map indicating whetherthe data in each block is valid or invalid in units of sectors, and thesecond sector bit map indicating whether any data in the block is notwritten yet into the second external storage in units of sectors.
 8. Theapparatus of claim 1, wherein the driver further comprises anintra-block data managing module configured to provide a sector bit map,a first flag and a second flag for each block orate cache area and thefirst external storage, and to manage the bit map, the first flag andthe second flag as management data in a management data storage area inthe memory, the sector bit map indicating whether the data in each blockis valid or invalid in units of sectors, the first flag indicatingwhether data not written yet into the second external storage exists inthe block, and the second flag indicating whether data exists in thewhole or part of the block.
 9. The apparatus of claim 7, wherein thedriver further comprises a data guaranteeing module configured to: causethe flush controller to store, into the second external storage, dataexisting in the cache area and not written yet into the second externalstorage and data existing in the first external storage and not writtenyet into the second external storage, at the time of receiving ashutdown notice from the host system; cause the intra-block datamanaging module to store the management data in the management datastorage area into a management data save area in the first externalstorage, after the flush controller finished operating; and cause theintra-block data managing module to store the management data in themanagement data save area into the management data storage area, and toinitialize the management data about the cache area, at the time ofactivation.
 10. The apparatus of claim 9, wherein the data guaranteeingmodule is configured to: provide a third flag in the management datasave area, the third flag indicating Whether data accumulated in thefirst external storage is consistent with data stored in the secondexternal storage, and the third flag comprising a first value when thedriver is operating and a second value when the driver is not operating;update the value of the third flag by the second value when theintro-block data managing module stores the management data in themanagement data storage area into the management data save area in thefirst external storage; cause the intra-block data managing module tostore the management data in the management data save area into themanagement data storage area and update the value of the third flag bythe first value, if the third flag comprises the second value when thedriver is activated; and initialize the management data in themanagement data save area to discard data in the first external storageand update the value of the third flag by the first value, if the thirdflag comprises the first value when the driver is activated.
 11. Theapparatus of claim 9, further comprising an activating module configuredto write data into the second external storage and read data from thesecond external storage before the driver starts operating, wherein: thedata guaranteeing, module is configured to provide a third flag in themanagement data save area, the third flag indicating, whether dataaccumulated in the first external storage is consistent with data storedin the second external storage and the third flag comprising a firstvalue when the driver is operating, a second value when the activatingmodule is operating and a third value when neither the driver nor theactivating module is operating; the activating module is configured toupdate the value of the third flag by the second value, and toaccumulate a write request issued to the second external storage, astrace data, in the management data save area, if the third flagcomprises the third value at the time of activation; and the dataguaranteeing module is further configured to: update the value of thethird flag, by the third value, when the intra-block data managingmodule stores the management data in the management data storage areainto the management data save area in the first external storage; causethe intra-block data managing module to store the management data in themanagement data save area into the management data storage area,invalidate the updated data by the activating module, which exists inthe first external storage, by referring to the trace data, and updatethe value of the third flag by the first value, if the third flagcomprises the second value when the driver is activated; and initializethe management data in the management data save area to discard data inthe first external storage, and update the value of the third flag bythe first value, if the third flag comprises a value other than thesecond value when the driver is activated.
 12. The apparatus of claim11, wherein the activating module is configured to terminateaccumulating the trace data and to update the value of the third flag bythe third value, if the amount of the trace data exceeds a predeterminedamount.
 13. The apparatus of claim 9, wherein the data guaranteeing,module is configured to: manage individual data and the power cyclecounter about the second external storage in the management data savearea; acquire the individual data and the power cycle counter from thesecond external storage at the time of activating the driver; andinitialize the management data about the second external storage in themanagement data save area to discard data about the second externalstorage stored in the first external storage, if the individual dataacquired from the second external storage differs from the individualdata managed in the management data save area or if the value obtainedby subtracting one from the power cycle counter acquired from the secondexternal storage differs from the power cycle counter managed in themanagement data save area.
 14. The apparatus of claim 13, furthercomprising an activating module configured to write data into the secondexternal storage and read data from the second external storage beforethe driver starts operating, wherein the activating module is configuredto: acquire the individual data and the power cycle counter from thesecond external storage at the time of activation; read data from thefirst external storage if data to be read exists in the first externalstorage when the individual data acquired from the second externalstorage is identical to the individual data managed in the managementdata save area and the value obtained by subtracting one from the powercycle counter acquired from the second external storage is identical tothe power cycle counter managed in the management data save area; andinvalidate data in the first external storage, if data to be updated dueto writing, data into the second external storage exists in the firstexternal storage, when the individual data acquired from the secondexternal storage is identical to the individual data managed in themanagement data save area and the value obtained by subtracting one fromthe power cycle counter acquired from the second external storage isidentical to the power cycle counter managed in the management data savearea.
 15. The apparatus of claim 14, wherein the data guaranteeingmodule is configured to invalidate the data of a block in the firstexternal storage, if the second flag associated with the block indicatesthat a part of data exists when the data guaranteeing module makes theintra-block data managing module store the management data in themanagement data storage area into the management data save area.
 16. Theapparatus of claim 14, wherein: the activating module is configured toread data from the first external storage only if the second flagassociated with the data indicates that whole data exists in the firstexternal storage when data to be read exists in the first externalstorage; and, the data guaranteeing module is configured to invalidatedata of a block in the first external storage, if the second flagassociated with the block indicates that a part of the data exists whenthe driver is activated.
 17. The apparatus of claim 14, wherein: thedriver further comprises a boot data managing module configured toprovide a fourth flag in the management data save area for each block ofthe cache area and the first external storage, the fourth flagindicating whether data is requested to be read when the host system isactivating; the activating module is configured to: set the fourth flagassociated with data in the first external storage to indicate that thedata is requested to be read when the host system is activating, if datato be read, exists in the first external storage; and accumulate a readrequest issued to the second external storage, as trace data, in themanagement data save area, if data to be read does not exist in thefirst external storage; the read controller is configured to: read datafrom the second external storage, which was read by the activatingmodule, by referring to the trace data, accumulate the read data in thefirst external storage and set the fourth flag associated with the datain the first external storage to indicate that the data is requested tobe read when the host system is activating, when the driver is activatedor when an activation completion notice is received from the hostsystem; set the fourth flag associated with the data in the firstexternal storage to indicate that the data is requested to be read whenthe host system is activating, if data to be read exists in the cachearea or the first external storage when the host system issues a readrequest until the activation completion notice is received from the hostsystem; and accumulate data read from the second external storage in thefirst external storage and set the fourth flag associated with the datain the first external storage to indicate that the data is requested tobe read when the host system is activating, if data to be read does notexist in the first external storage when the host system issues a readrequest until the activation completion notice is received from the hostsystem; the read controller and the write controller are configured tomaintain data in the first external storage so that data, for which thefourth flag indicates that the data is requested to be read when thehost system is activating, remains in the first external storage; andthe boot data managing module is configured to reset the fourth flag toindicate that the data is not requested to be read when the host systemis activating, upon receiving a shutdown notice from the host system.18. The apparatus of claim 17, wherein the activating module and thewrite controller are configured to reset the fourth flag associated withdata to be updated in the first external storage to indicate that thedata is not requested to be read when the host system is activating, ifdata to be updated exists in the first external storage.
 19. Theapparatus of claim 17, wherein the read controller is configured toterminate setting the fourth flag to indicate that the data is requestedto be read when the host system is activating, before receiving theactivation completion notice, if the amount of data for which the fourthflag is set to indicate that the data is requested to be read when thehost system is activating, reaches a predetermined amount.
 20. Theapparatus of claim 1, wherein the flush controller is configured tooperate a first mode and a second mode, in the first mode, the flushcontroller is configured to issue, on receiving from the host system aflush request for writing cached data, a write request to the secondexternal storage so that data not written yet into the second externalstorage in the cache area and the first external storage is written intothe second external storage, and to issue, after issuing the writerequest, a flush request to the second external storage so that cacheddata in the second external storage is written into the second externalstorage; and in the second mode, the flush controller is configured todo nothing on receiving from the host system a flush request, to issue awrite request to the second external storage so that data not writtenyet into the second external storage in the cache area and the firstexternal storage is written into the second external storage, when apredetermined time elapses from a previous flush operation or when theamount of data to be written, in the first external storage, increasesto a predetermined amount.
 21. The apparatus of claim 2, Wherein thewrite controller comprises another operating mode, in the otheroperating mode, the write controller is configured to store data intothe cache area or rewrite data in the cache area or the first externalstorage and to notify the host system of the write completion, withoutissuing a write FUA request to the second external storage, on receivingfrom the host system the write FUA request.
 22. The apparatus of claim1, wherein the read controller comprises: a first module configured toreserve a merge buffer area in the memory, in which a first part of datato be read in the cache area or the first external storage is combinedwith a second part of data to be read in the second external storage;and a second module configured to read data in a minimal amountnecessary for combining data to be read, from the second externalstorage into the merge buffer area, and to transfer data lacking in thecache area or the first external storage, from the merge buffer areainto the cache area.
 23. The apparatus of claim 22, wherein the flushcontroller is configured to combine data in the second external storagewith data not written yet into the second external storage, dispersed inthe cache area, using the merge buffer area, and to store the combineddata into the second external storage, when data not written yet intothe second external storage is dispersed in the cache area.
 24. Theapparatus of claim 1, wherein the driver further comprises a settingmodule configured to acquire a page size of the first external storage,and to allocate blocks to the first external storage with reference topage boundaries in the first external storage, data length of the blocksbeing set a multiple of the page size.
 25. The apparatus of claim 1,wherein data exchange of the cache area and the first external storageis controlled by a set associative method.
 26. A driver stored in anon-transitory computer readable medium which operates in an informationprocessing apparatus comprising a memory comprising a buffer area whichis reserved in order to transfer data between the driver and a hostsystem that requests for data writing and data reading, a first externalstorage and a second external storage, the driver being configured tocontrol the first and second external storages in units of predeterminedblocks, the driver comprising: a cache reservation module configured toreserve a cache area in the memory, the cache area being logicallybetween the buffer area and the first external storage and between thebuffer area and the second external storage, the driver being configuredto manage the cache area in units of the predetermined blocks using thecache area, secured on the memory by the cache reservation module, as aprimary cache for the second external storage and as a cache forth thefirst external storage, and using part or the entire first externalstorage as a secondary cache for the second external storage; a readcontroller configured to operate in response to a read request issued bythe host system, and configured to: store data in the cache area intothe buffer area if whole data to be read exists in the cache area; reada first part of data not existing in the cache area from the secondexternal storage into the cache area, store the read first part of dataand a second part of data existing in the cache area into the bufferarea, and accumulate the stored data in the first external storage, if apart of data to be read exists in the cache area; read data in the firstexternal storage and store the read data into the buffer area if data tobe read does riot exist in the cache area and whole data to be readexists in the first external storage; read a first part of data in thefirst external storage and a second part of data in the second externalstorage into the cache area, store the read data into the buffer area,and accumulate the read data in the first external storage, if data tobe read does not exist in the cache area and a part of data to be readexists in the first external storage; and read data in the secondexternal storage into the cache area, store the read data in the bufferarea and accumulate the read data in the first external storage, if datato be read does not exist in the cache area or the first externalstorage; a write controller configured to operate in response to a writerequest issued by the host system, and configured to: rewrite data inthe cache area by data to be written and accumulate the rewritten datain the first external storage, if data to be updated exists in the cachearea and does not exist in the first external storage; invalidate datain the first external storage, rewrite data in the cache area by data tobe written and accumulate the rewritten data in the first externalstorage, if data to be updated exists in the cache area and the firstexternal storage; rewrite data in the first external storage by data tobe written it data to be updated does not exist in the cache area andexists in the first external storage; and store data to be written intothe cache area and accumulate the stored data into the first externalstorage, if data to be updated does not exist in the cache area or thefirst external storage; and a flush controller configured to store dataexisting in the cache area and not written yet into the second externalstorage, into the second external storage, and to store data existing inthe first external storage and not written yet into the second externalstorage, into the second external storage through the cache area.
 27. Aninformation processing apparatus comprising a circuitry that interfaceswith a first storage, a second storage, and a volatile memory devicethat stores a set of instructions, the volatile memory device includinga buffer area and a cache area, the circuitry being configured toexecute the set of instructions to: in response to a first read requestfor acquiring first data: acquire the first data from the secondstorage, store in the first storage the first data, and store the firstdata in the volatile memory device; in response to a second read requestfor acquiring the first data: determine whether the first data is storedin the volatile memory device; if the first data is not stored in thevolatile memory device: acquire the first data from the first storage,and store the first data in the volatile memory device; in response to afirst write request: rewrite data in the cache area by data to bewritten and accumulate the rewritten data in the first storage, if datato be updated exists in the cache area and does not exist in the firststorage, invalidate data in the first storage, rewrite data in the cachearea by data to be written and accumulate the rewritten data in thefirst storage, if data to be updated exists in the cache area and thefirst storage, rewrite data in the first storage by data to be writtenif data to be updated does not exist in the cache area and exists in thefirst storage, and store data to be written into the cache area andaccumulate the stored data into the first storage, if data to be updateddoes not exist in the cache area or the first storage; and store dataexisting in the cache area and not written yet into the second storage,into the second storage, and to store data existing in the first storageand not written yet into the second storage, into the second storagethrough the cache area.
 28. The information processing apparatus ofclaim 27, wherein the circuitry is configured to execute the set ofinstructions to: receive the first read request; and receive the secondread request.
 29. The information processing apparatus of claim 28,wherein the first read request is received before the second readrequest.
 30. The information processing apparatus of claim 28, whereinthe first and second read requests are received consecutively.
 31. Theinformation processing apparatus of claim 27, wherein the storing of thefirst data in the volatile memory device constitutes a completedresponse to the first read request.
 32. The information processingapparatus of claim 27, wherein the first and second storages usedifferent storage mediums.
 33. The information processing apparatus ofclaim 27, wherein the second storage includes a magnetic storage device,and wherein the first storage includes a solid state storage device. 34.The information processing apparatus of claim 27, wherein the circuitryis further configured to execute the set of instructions to: determinewhether the first data is stored in the volatile memory device; andacquire the first data from the first storage after determining that thefirst data is not stored in the volatile memory device.
 35. Theinformation processing apparatus of claim 34, wherein the circuitry isfurther configured to execute the set of instructions to: determinewhether the first data is stored in the first storage; and acquire thefirst data from the second storage after determining that the first datais not stored in the volatile memory device or the second storage. 36.The information processing apparatus of claim 27, wherein the circuitryis further configured to execute the set of instructions to: receive asecond write request to store second data for replacing the first data;store the second data in at least one of the volatile memory device andthe first storage; store the second data in the second storage; andidentify that the second write request has been completed.
 37. Theinformation processing apparatus of claim 36, wherein the circuitry,when operating under a first mode of write operation, identifies thatthe second write request has been completed after storing the seconddata in the first storage but before completing storing the second datain the second storage.
 38. The information processing apparatus of claim37, wherein the circuitry is further configured to execute the set ofinstructions to: determine whether the first data is stored in at leastone of the volatile memory device and the first storage; afterdetermining that the first data is not stored in the volatile memorydevice and is not stored in the first storage: store the second data inthe volatile memory device, after identifying that the second writerequest has been completed, store the second data in the first storage,and replace the first data with the second data in the second storage.39. The information processing apparatus of claim 38, wherein thecircuitry is further configured to execute the set of instructions to:after determining that the first data is stored in the volatile memorydevice: before identifying that the second write request has beencompleted, replace the first data with the second data in the volatilememory device, and store the second data in the first storage.
 40. Theinformation processing apparatus of claim 36, wherein the circuitry,when operating under a second mode of write operation, identifies thatthe second write request has been completed after storing the seconddata in the second storage.
 41. The information processing apparatus ofclaim 40, wherein the circuitry is further configured to execute the setof instructions to: determine whether the first data is stored in atleast one of the volatile memory device and the first storage; afterdetermining that the first data is stored in the volatile memory deviceand is not stored in the first storage: replace the first data stored inthe volatile memory device and in the second storage with the seconddata, and after identifying that the second write request has beencompleted, replace the first data in the first storage with the seconddata.
 42. The information processing apparatus of claim 41, wherein thecircuitry is further configured to execute the set of instructions to:after determining that the first data is stored in the first storage andis not stored in the volatile memory device, replace the first datastored in the second storage and in the first storage with the seconddata.
 43. The information processing apparatus of claim 41, wherein thecircuitry is further configured to execute the set of instructions to:after determining that the first data is not stored in the first storageand not in the volatile memory device, replace the first data stored inthe second storage with the second data.
 44. The information processingapparatus of claim 40, wherein the circuitry is further configured toexecute the set of instructions to: receive a request to enter thesecond mode of write operation; wherein the second mode of writeoperation is performed after receiving the request.
 45. The informationprocessing apparatus of claim 36, wherein the circuitry is furtherconfigured to execute the set of instructions to: receive an indicationof system shutdown; after receiving the indication of system shutdown:update the first data in the first and second storages based on thefirst data stored in the volatile memory device, and store the seconddata in the first storage; receive an indication of system activation;and after receiving the indication of system activation, storing thesecond data in the volatile memory device.
 46. The informationprocessing apparatus of claim 45, wherein the circuitry is furtherconfigured to execute the set of instructions to: determine whether thesecond data stored in the first storage is consistent with the firstdata stored in the second storage; and if the second data stored in thefirst storage is determined to be consistent with the first data storedin the second storage, transfer the second data from the first storageto the volatile memory device.
 47. The information processing apparatusof claim 46, wherein the determination of whether the second data storedin the first storage is consistent with the first data stored in thesecond storage comprises the circuitry being configured to execute theset of instructions to determine at least one of: a source of the firstdata stored in the second storage, and a number of times of powerswitches associated with the first and second storages.
 48. Theinformation processing apparatus of claim 27, wherein the first andsecond read requests are associated with a system boot.
 49. Theinformation processing apparatus of claim 48, wherein the circuitry isfurther configured to execute the set of instructions to: determine thatthe first read request is associated with the system boot; afterdetermining that the first read request is associated with the systemboot, determine that the first data stored in the first storage is notto be updated until a write request is received to update the firstdata.
 50. The information processing apparatus of claim 36, wherein thecircuitry is further configured to execute the set of instructions to:receive a third read request for third data; determine that at leastpart of the third data is not stored in the volatile memory device;acquire the at least part of the third data from a merge buffer; storethe acquired at least part of the third data in the volatile memorydevice; and provide the third data, including the acquired at least partof the third data, stored in the volatile memory device as a response tothe third read request.
 51. The information processing apparatus ofclaim 50, wherein the data in the merge buffer is acquired from at leastone of the first and second storages.
 52. The information processingapparatus of claim 27, wherein the circuitry is further configured toexecute the set of instructions to: acquire a page size of the firststorage; and allocate blocks to the first storage based on pageboundaries in the first storage, data length of the blocks being set amultiple of the page size.
 53. The information processing apparatus ofclaim 27, wherein data exchange between the volatile memory device andthe first storage is controlled by a set associative method.
 54. Theinformation processing apparatus of claim 27, wherein the informationprocessing apparatus further comprises the first storage.
 55. Aninformation processing apparatus that interfaces with a host system, theinformation processing apparatus comprising: a first storage including anonvolatile semiconductor memory device; a second storage including ahard disk drive; a volatile semiconductor memory device; and a circuitrythat interfaces with the first storage, the second storage, and thememory, the circuitry being capable of: receiving from the host system afirst write request to write first data; in response to receiving thefirst write request: writing the first data in the volatilesemiconductor memory device, writing the first data in the first storageafter writing the first data in the volatile semiconductor memorydevice, and writing the first data in the second storage after writingthe first data in the volatile semiconductor memory device; receivingfrom the host system a first read request to read the first data afterthe receiving the first write request; and in response to receiving thefirst read request: determining whether the first data is stored in thefirst storage, and reading the first data from the first storage, if thefirst data is stored in the first storage; in response to a second writerequest to write second data: rewriting data in the volatilesemiconductor memory device by the second data to be written andaccumulating the rewritten data in the first storage, if data to beupdated exists in the volatile semiconductor memory device and does notexist in the first storage, invalidating data in the first storage,rewriting data in the cache area by the second data to be written andaccumulating the rewritten data in the first storage, if data to beupdated exists in the volatile semiconductor memory device and the firststorage, rewriting data in the first storage by the second data to bewritten if data to be updated does not exist in the volatilesemiconductor memory device and exists in the first storage, and storingthe second data to be written into the volatile semiconductor memorydevice and accumulating the stored data into the first storage, if datato be updated does not exist in the volatile semiconductor memory deviceor the first storage; and storing data existing in the volatilesemiconductor memory device and not written yet into the second storage,into the second storage, and storing data existing in the first storageand not written yet into the second storage, into the second storagethrough the volatile semiconductor memory device.
 56. The informationprocessing apparatus of claim 55, wherein the circuitry is capable of:in response to receiving the first read request: determining whether thefirst data is stored in the volatile semiconductor memory device, andreading the first data from the volatile semiconductor memory device, ifthe first data is stored in the volatile semiconductor memory device.57. The information processing apparatus of claim 55, wherein thewriting of the first data in the first storage occurs in parallel to thewriting of the first data in the second storage in a first mode of theinformation processing apparatus.
 58. The information processingapparatus of claim 57, wherein the writing of the first data in thefirst storage is performed before the writing of the first data in thesecond storage in a second mode of the information processing apparatus.59. The information processing apparatus of claim 58, wherein theinformation processing apparatus is capable of setting an operation modeof the information processing apparatus to either one of the first andsecond modes based on a parameter indicating either one of the first andsecond modes.
 60. The information processing apparatus of claim 58,wherein the writing of the first data in the first storage is performedafter the writing of the first data in the second storage.
 61. Theinformation processing apparatus of claim 55, wherein the circuitry iscapable of: notifying the host system that the first write request hasbeen completed before a completion of the writing of the first data inthe second storage.
 62. The information processing apparatus of claim55, wherein the circuitry is capable of: notifying the host system thatthe first write request has been completed after receiving anotification of data writing operation from the second storage.
 63. Theinformation processing apparatus of claim 55, wherein the volatilesemiconductor memory stores a driver, and wherein the circuitry iscapable of executing the driver.
 64. The information processingapparatus of claim 63, wherein the volatile semiconductor memory furtherstores an operating system, and wherein the driver operates under theoperating system.
 65. The information processing apparatus of claim 55,wherein the first storage includes a solid state drive including thenonvolatile semiconductor memory.
 66. The information processingapparatus of claim 55, wherein the nonvolatile semiconductor memoryincludes a flash memory.
 67. The information processing apparatus ofclaim 55, wherein the circuitry is capable of: receiving from the hostsystem a second read request to read second data; in response toreceiving the second read request: reading the second data from thesecond storage, writing in the volatile semiconductor memory device thesecond data read from the second storage, and writing the second data inthe first storage; receiving from the host system a third read requestto read the second data after the receiving the second read request, andin response to receiving the third read request: determining whether thesecond data is stored in the first storage; and reading the second datafrom the first storage if the second data is stored in the firststorage.
 68. The information processing apparatus of claim 55, whereinthe circuitry is capable of: receiving from the host system a thirdwrite request to write third data for replacing the first data, and inresponse to receiving the third write request: writing the third data inthe volatile semiconductor memory, invalidating the first data stored inthe first storage, and writing the third data in the first storage. 69.An information processing apparatus that interfaces with a host system,the information processing apparatus comprising: a first storageincluding a solid state drive, the solid state drive including anonvolatile semiconductor memory; a second storage including a hard diskdrive, the first storage being configured to perform as a read cache forthe second storage; a volatile semiconductor memory device; and acircuitry that interfaces with the first storage, the second storage,and the volatile semiconductor memory device, the circuitry beingcapable of: receiving from the host system a first write request towrite first data; after receiving the write request, writing the firstdata in the first storage in units of first blocks each having a firstpredetermined size; wherein the first predetermined size is greater thana size of a minimum unit of a write operation of at least one of thefirst and second storages; in response to a second write request towrite second data: rewriting data in the volatile semiconductor memorydevice by the second data to be written and accumulating the rewrittendata in the first storage, if data to be updated exists in the volatilesemiconductor memory device and does not exist in the first storage,invalidating data in the first storage, rewriting data in the cache areaby the second data to be written and accumulating the rewritten data inthe first storage, if data to be updated exists in the volatilesemiconductor memory device and the first storage, rewriting data in thefirst storage by the second data to be written if data to be updateddoes not exist in the volatile semiconductor memory device and exists inthe first storage, and storing the second data to be written into thevolatile semiconductor memory device and accumulating the stored datainto the first storage, if data to be updated does not exist in thevolatile semiconductor memory device or the first storage; and storedata existing in the volatile semiconductor memory device and notwritten yet into the second storage, into the second storage, andstoring data existing in the first storage and not written yet into thesecond storage, into the second storage through the volatilesemiconductor memory device.
 70. The information processing apparatus ofclaim 69, wherein the circuitry is capable of: receiving from the hostsystem a read request to read second data; and reading the second datafrom the first storage in units of second blocks each having a secondpredetermined size.
 71. The information processing apparatus of claim69, wherein the circuitry is capable of accessing the first storageusing management information regarding data mapping on the firststorage.
 72. The information processing apparatus of claim 71, whereinthe volatile semiconductor memory device stores the managementinformation, and wherein the circuitry is capable of: reading themanagement information from the volatile semiconductor memory device;and writing, in the first storage, the management information read fromthe volatile semiconductor memory device.
 73. The information processingapparatus of claim 72, wherein the circuitry is capable of writing themanagement information in the first storage during a shutdown operationof the information processing apparatus.
 74. The information processingapparatus of claim 72, wherein the circuitry is capable of writing themanagement information in the first storage after the circuitry receivesa shutdown notice.
 75. The information processing apparatus of claim 73,wherein, when the information processing apparatus is activated from theshutdown, the circuitry is capable of: reading the managementinformation from the first storage; and writing, in the volatilesemiconductor memory device, the management information read from thefirst storage.
 76. The information processing apparatus of claim 74,wherein, when the information processing apparatus is activated from theshutdown, the circuitry is capable of: reading the managementinformation from the first storage; and writing, in the volatilesemiconductor memory device, the management information read from thefirst storage.
 77. The information processing apparatus of claim 71,wherein the management information includes information indicating whichportion of data stored in the first storage is valid.
 78. Theinformation processing apparatus of claim 71, wherein the managementinformation includes information indicating which portion of data in thefirst storage is to be written to the second storage.
 79. Theinformation processing apparatus of claim 69, wherein the volatilesemiconductor memory stores a set of instructions, and wherein thecircuitry executes the set of instructions.
 80. The informationprocessing apparatus of claim 69, wherein the volatile semiconductormemory stores a driver, and wherein the circuitry is capable ofexecuting the driver.
 81. The information processing apparatus of claim80, wherein the volatile semiconductor memory further stores anoperating system, and wherein the driver operates under the operatingsystem.
 82. The information processing apparatus of claim 69, whereinthe nonvolatile semiconductor memory is a flash memory.
 83. Theinformation processing apparatus of claim 69, wherein the firstpredetermined size is a greater than one kilo bytes.
 84. The informationprocessing apparatus of claim 69, wherein the first predetermined sizeis greater than a size of a sector.
 85. A method to operate aninformation processing device that interfaces with a first storage, asecond storage, and a volatile memory device, the method comprising: inresponse to a first read request for acquiring first data: acquiring thefirst data from the second storage, storing in the first storage thefirst data, and storing the first data in the volatile memory device; inresponse to a second read request for acquiring the first data:determining whether the first data is stored in the volatile memorydevice; if the first data is not stored in the volatile memory device:acquiring the first data from the first storage, and storing the firstdata in the volatile memory device; in response to a first write requestto write data: rewriting data in the volatile semiconductor memorydevice by the data to be written and accumulating the rewritten data inthe first storage, if data to be updated exists in the volatilesemiconductor memory device and does not exist in the first storage,invalidating data in the first storage, rewriting data in the cache areaby the data to be written and accumulating the rewritten data in thefirst storage, if data to be updated exists in the volatilesemiconductor memory device and the first storage, rewriting data in thefirst storage by the data to be written if data to be updated does notexist in the volatile semiconductor memory device and exists in thefirst storage, and storing the data to be written into the volatilesemiconductor memory device and accumulating the stored data into thefirst storage, if data to be updated does not exist in the volatilesemiconductor memory device or the first storage; and storing dataexisting in the volatile semiconductor memory device and not written yetinto the second storage, into the second storage, and storing dataexisting in the first storage and not written yet into the secondstorage, into the second storage through the volatile semiconductormemory device.
 86. The method of claim 85, further comprising: receivingthe first read request; and receiving the second read request.
 87. Themethod of claim 86, wherein the first read request is received beforethe second read request.
 88. The method of claim 86, wherein the firstand second read requests are received consecutively.
 89. The method ofclaim 85, wherein the storing of the first data in the volatile memorydevice constitutes a completed response to the first read request. 90.The method of claim 85, further comprising: receiving a second writerequest to store second data for replacing the first data; storing thesecond data in at least one of the volatile memory device and the firststorage; storing the second data in the second storage; and providing anindication that that the second write request has been completed. 91.The method of claim 90, wherein the indication that the second writerequest has been completed is provided after storing the second data inthe first storage but before completing storing the second data in thesecond storage.
 92. The method of claim 90, wherein the indication thatthe second write request has been completed is provided after storingthe second data in the second storage.
 93. A non-transitory computerreadable medium that stores a set of instructions that, when executed bycircuitry that interfaces with a first storage, a second storage, and avolatile memory device, causes the circuitry to perform a method ofinformation processing, the method comprising: in response to a firstread request for acquiring first data: acquiring the first data from thesecond storage, storing in the first storage the first data, and storingthe first data in the volatile memory device; in response to a secondread request for acquiring the first data: determining whether the firstdata is stored in the volatile memory device; if the first data is notstored in the volatile memory device: acquiring the first data from thefirst storage, and storing the first data in the volatile memory device;in response to a first write request to write data: rewriting data inthe volatile semiconductor memory device by the data to be written andaccumulating the rewritten data in the first storage, if data to beupdated exists in the volatile semiconductor memory device and does notexist in the first storage, invalidating data in the first storage,rewriting data in the cache area by the data to be written andaccumulating the rewritten data in the first storage, if data to beupdated exists in the volatile semiconductor memory device and the firststorage, rewriting data in the first storage by the data to be writtenif data to be updated does not exist in the volatile semiconductormemory device and exists in the first storage, and storing the data tobe written into the volatile semiconductor memory device andaccumulating the stored data into the first storage, if data to beupdated does not exist in the volatile semiconductor memory device orthe first storage; and storing data existing in the volatilesemiconductor memory device and not written yet into the second storage,into the second storage, and storing data existing in the first storageand not written yet into the second storage, into the second storagethrough the volatile semiconductor memory device.
 94. The medium ofclaim 93, wherein the method further comprises: receiving the first readrequest; and receiving the second read request.
 95. The medium of claim94, wherein the first read request is received before the second readrequest.
 96. The medium of claim 94, wherein the first and second readrequests are received consecutively.
 97. The medium of claim 93, whereinthe storing of the first data in the volatile memory device constitutesa completed response to the first read request.
 98. The medium of claim93, wherein the method further comprises: receiving a second writerequest to store second data for replacing the first data; storing thesecond data in at least one of the volatile memory device and the firststorage; storing the second data in the second storage; and providing anindication that that the second write request has been completed. 99.The medium of claim 98, wherein the indication that the second writerequest has been completed is provided after storing the second data inthe first storage but before completing storing the second data in thesecond storage.
 100. The medium of claim 98, wherein the indication thatthe second write request has been completed is provided after storingthe second data in the second storage.